Error Analysis

Error Analysis
Computer Aided Testing System




Faults on the circuit board under test are analyzed by software to determine probable causes, and next test determination, if required. This is accomplished using different methods, depending on the type of failure the board is experiencing. The information listed below outlines the procedure taken and / or the paths followed during actual testing at GLS1 Electronics, using the testing device. The example below involves the testing of Ram chips on a Ms Pacman board, the text from the test table is shown here:
0026 00230014050060000000 Ram 4L 4P 4400-47FF Random 000-255
(Write random numbers in the range of 0-255 to address locations 4400-47FF). Read back all addresses, compare with expected data, counting each good data location. Resolving data bit errors:
Example of Ram Chip failure, Location 4P, Ms Pacman, Data bit (4)
Subtract the end address from the start address, divide this value by 256. This number represents the amount of times, by sheer randomness, that the expected return value will show as correct, even if it is not, for the results of the test. For this example, the amount of good locations is much greater than that number, (507 as compared to 4) .
Ram 4L 4P Ms Pacman <#012873> 09-07-2003 16:50:35 4 < 1024/256 > 507 < actual locations test OK 49% > 517 < actual location errors 51% > 0 < amount of lines test ok > 64 < amount of lines with errors > M = Master data, R = Received data Address M 4400 83 2A 7D 1D 21 58 1C 08 4D 4B 17 D5 E6 B8 62 7C R 4400 83 2A 6D 0D 21 48 0C 08 4D 4B 07 C5 E6 A8 62 6C M 4410 9A E8 31 31 57 5F 0B 2E 02 BB 20 B2 6B DE DB 4A R 4410 8A E8 21 21 47 4F 0B 2E 02 AB 20 A2 6B CE CB 4A M 4420 7F 50 BB 4F BF DE 60 B0 F2 88 E2 F1 18 99 67 74 R 4420 7F 50 BB 5F BF CE 70 B0 F2 98 F2 F1 18 89 77 74 M 4430 9E 18 F3 F7 D7 5F 81 5F AB 0A 54 B4 8A 13 88 6C R 4430 9E 18 F3 F7 D7 5F 91 5F BB 1A 54 B4 9A 13 98 7C M 4440 A4 3B EC EC 5C AB 14 4C F9 DA A9 5B A0 B2 04 E2 R 4440 B4 3B FC FC 5C BB 14 5C F9 DA B9 5B B0 B2 14 F2 M 4450 7F F0 FB 2E 4B C9 FB C8 EB D3 58 87 76 23 E0 C9 R 4450 6F E0 EB 2E 4B C9 EB C8 EB C3 48 87 66 23 E0 C9 M 4460 5B B2 B6 FC DF 05 5E 65 CC 0D 14 1A 68 4C 62 50 R 4460 4B A2 A6 EC CF 05 4E 65 CC 0D 04 0A 68 4C 62 40 M 4470 A5 39 F1 DA 97 E5 9F F1 2B DF D2 33 15 57 0E E7 R 4470 A5 29 E1 CA 87 E5 8F E1 2B CF C2 23 05 47 0E E7 M 4480 0B 7E C1 89 30 35 66 81 D2 E5 CA 36 59 AC A8 43 R 4480 0B 6E C1 89 20 25 66 81 C2 E5 CA 26 49 AC A8 43 <more...>

Check each pin on the data bus:
This step involves subtracting the expected value from the received value, (for each address location). If this number does not equal zero, then convert it to base 2 and analyze. The results obtained by this method will show which data bit(s) are failing. Any "1's" in the result point to failures in that position of the data bus. If throughout the address range, there are failures on only one bit, this will point to an open or shorted condition on that node, but not shorted to another data bit. If throughout the address range, there are failures on more than one bit, but not all bits, this will point to open or shorting conditions existing between these bits, or traces, on the circuit board.
				Because it is shown here that errors exist in only one position, there is no need for addressing tests to determine the source of this problem. This analysis indicates pin 11 of the chip is out of the socket,. there is a cut trace, a connection, etc. Of course, any failure here can also indicate the ram chip itself has failed.
If there are errors in all data bit positions, then this may indicate an addressing error, (or the chip is bad) and the next test determination would be set to point at the tests in the test table which deal with addressing individual pins on the Ram chip. These tests are shown below.
Verify address line connections to the RAM chip, using external probe (or scope)
Resolving Address line errors:
These are test numbers 0106 - 0115 from the Ms Pacman test table . These tests can be run through the main testing program. Their purpose is to test each address line individually, as they relate with the 2114 Ram chips on a Ms Pacman PCB:
0106 01000000000000200000 Toggle A(0) 0001-0001 Return to Zero Pin 15 4P 0107 01000000000000200000 Toggle A(1) 0002-0002 Return to Zero Pin 16 4P 0108 01000000000000200000 Toggle A(2) 0004-0004 Return to Zero Pin 17 4P 0109 01000000000000200000 Toggle A(3) 0008-0008 Return to Zero Pin 1 4P 0110 01000000000000200000 Toggle A(4) 0010-0010 Return to Zero Pin 2 4P 0111 01000000000000200000 Toggle A(5) 0020-0020 Return to Zero Pin 3 4P 0112 01000000000000200000 Toggle A(6) 0040-0040 Return to Zero Pin 4 4P 0113 01000000000000200000 Toggle A(7) 0080-0080 Return to Zero Pin 5 4P 0114 01000000000000200000 Toggle A(8) 0100-0100 Return to Zero Pin 6 4P 0115 01000000000000200000 Toggle A(9) 0200-0200 Return to Zero Pin 7 4P

For more flexibility, test # 0377 opens the Ms Pacman troubleshooting module. This tool enables testing each pin on the address bus individually, by pointing at the chip with a mouse, and selecting each pin.

0377 Open module mode 1 Troubleshoot n/a Return last test 2114's

More information on troubleshooting tool